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[Other resource8051inVHDL

Description: 一个8051的VHDL代码,可完整编译, 但不保证版图映射成功,可作为设计微处理器的参考-a 8051 VHDL code can be compiled integrity, but it does not guarantee success territory mapping, the microprocessor can be used as a reference design
Platform: | Size: 162907 | Author: 韩红 | Hits:

[Other resourceIPCORE

Description: 最简单的八位单片机8051的源代码,支持MCS51的汇编语言,可综合,VHDL语言描述,有测试环境-most simple eight SCM 8051 source code, a compilation support MCS51 language, integrated, VHDL description of a test environment
Platform: | Size: 137935 | Author: 许盛 | Hits:

[Other resource8051VHDLyuandaima

Description: 这是用C语言编写的关于8051的VHDL的源代码-This is the C language on the preparation of the 8051 VHDL source code
Platform: | Size: 394114 | Author: 毕晓宇 | Hits:

[Other resourcecpldTo8051

Description: CPLD与8051的总线接口的VHDL设计源码,包括原理图,VHDL语言的源程序,仿真波形,设计的详细说明-CPLD and 8051 bus interface VHDL design source code, including drawings, VHDL source, waveform simulation, design details
Platform: | Size: 52448 | Author: 蔡勇 | Hits:

[Other resourcemc8051_cyclone_nios

Description: 增强型8051的VHDL源代码,两个周期执行一条指令,仿真工具为Modelsim,开发板为Altera的EP1C20开发板-enhanced 8051 VHDL source code, the implementation of a two-cycle instruction, simulation tools for Modelsim, development board for the Altera EP1C20 development board
Platform: | Size: 2001413 | Author: 柳如飞 | Hits:

[VHDL-FPGA-Verilog8051VHDLyuandaima

Description: 这是用C语言编写的关于8051的VHDL的源代码-This is the C language on the preparation of the 8051 VHDL source code
Platform: | Size: 394240 | Author: 毕晓宇 | Hits:

[VHDL-FPGA-Verilogcpld

Description: 基于CPLD XC95018开发的一段VHDL代码,可实现多个8051单片机互相通讯,对多单片机系统的设计很有参考价值-Based on CPLD XC95018 developed section of VHDL code, can realize more than 8051 mutual communication, single-chip microcomputer system for the design of multi-reference value is
Platform: | Size: 907264 | Author: 蔡彬彬 | Hits:

[VHDL-FPGA-Verilogmc8051

Description: 8051 vhdl source code
Platform: | Size: 17408 | Author: vincent | Hits:

[VHDL-FPGA-Verilog8051code

Description: VHDL源码 8051+IP内核 在xilinx环境仿真运行 不带接口的逻辑部分代码-VHDL source code 8051+ IP cores in the xilinx environment simulation to run without a logical part of the code interface
Platform: | Size: 98304 | Author: 王力 | Hits:

[VHDL-FPGA-Verilogmc8051

Description: 用VHDL在FPGA上实现8051内核,代码简单,易懂-Implemented on FPGA using VHDL in the 8051 core, the code is simple, easy to understand
Platform: | Size: 394240 | Author: yang fa sheng | Hits:

[VHDL-FPGA-Verilog8051vhdl_ip_core

Description: 8051完整ip内核Vhdl源代码程序。-8051 ip core Vhdl complete source code program
Platform: | Size: 653312 | Author: zhouxiao | Hits:

[VHDL-FPGA-VerilogT51

Description: Intel 8051 的民間版 VHDL 原始碼. 在 XILINX ISE 可合成並跑過.-One of the VHDL source code for MCU 8051. This source code was been verified and successful compiles on the XILINX ISE enviroment.
Platform: | Size: 95232 | Author: Andy | Hits:

[VHDL-FPGA-Verilog8051_latest

Description: this project is regarding 8051 microcontroller development in VHDL language using xilinx tool for synthesis of code-this project is regarding 8051 microcontroller development in VHDL language using xilinx tool for synthesis of code
Platform: | Size: 5737472 | Author: gurhans | Hits:

[VHDL-FPGA-VerilogT51

Description: 免费的8051 VHDL 原码。很好的风格。 完整的说明和模拟环境。 实现后的面积很小,速度很高。我比较过这个码与商业的产品, 毫不逊色,在速度上还略有优势。 验证过了串口,输出入口,定时单元及运算单元。 -Free 8051 VHDL source. Good style. Complete description and simulation environment. After achieving the small size of the high speed. I have compared this code to some commercial products. It is somehow better in speed. The serial port, P ports and timing units are verified.
Platform: | Size: 195584 | Author: lisi | Hits:

[Other8051

Description: vhdl implementation of 8051 synthesizable code .. Follows machine cycle execution
Platform: | Size: 13312 | Author: test | Hits:

[assembly languageCodes

Description: VHDL code for 8051 blocks
Platform: | Size: 26624 | Author: ahmed | Hits:

[VHDL-FPGA-VerilogSLAVE-FIFO-8BITS

Description: EZUSB FX2 的 SLAVE FIFO例程,包含8051的Firmware以及FPGA的FIFO控制代码 -EZUSB FX2 SLAVE FIFO sample program, including the 8051 firmware, and 8-bit VHDL slave FIFO interface code for FPGA
Platform: | Size: 1676288 | Author: Eddie | Hits:

[VHDL-FPGA-VerilogTimers

Description: vhdl code for Timers in 8051
Platform: | Size: 1024 | Author: ali | Hits:
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